Design your system at the schematic level

• Fully hierarchical design approach
• Analog blocks readily modeled with CppSim code
• Digital blocks readily modeled with Verilog® (or CppSim) code
• Linear circuit elements and switches seamlessly included
• Feedback systems are efficiently simulated

Choose from different signal types

• Analog signals can be scalar or vector
• Digital signals can be single-bit or multi-bit
• Clock and signal edges can be double_interp for high precision or bool for digital logic

Leverage Object Oriented C++ Classes

• Easy creation of filters, noise, and PLL/DLL blocks
• IT++ classes are also available in Windows version

Several options for waveform viewing or postprocessing

• CppSimView waveform viewer
• GTKWave waveform viewer
• Python, Matlab®, or Octave postprocessing

Easy sharing of system descripions

• Export tool archives libraries and all required modules
• Import tool reads in only unique modules and prevents name clashes